Title: From Device Physics to Silicon: Compact Modeling from an Industry Perspective
Date and Time: 23rd September 2026 & 3:00 PM
Venue: SV Narasaiah Auditorium, IAP Department
Abstract: A semiconductor process technology brings together process integration, device architecture, and electrical characteristics to enable circuit design. The PDK serves as the common language between the fabrication process and circuit designers, translating technology capabilities into models and design rules that can be used to develop and evaluate circuits.
This talk will provide an industry-oriented view of compact modeling and its role within this technology-to-design interface. It will cover the key elements of modern compact models, including nominal device behavior, variability, parasitics, and reliability, and illustrate how these models are developed, validated, and used for circuit simulation, benchmarking, and technology evaluation.
The discussion will also highlight practical industry requirements such as accuracy, predictability, scalability, robustness, computational efficiency, and circuit-level correlation, along with opportunities for innovation in production-ready modeling.
About the speaker: Dr. Prasenjit Bhattacharya is a semiconductor researcher and R&D engineer with over 12 years of experience spanning device physics, compact modeling, silicon data analysis, and PDK development. He currently works at Intel on SPICE modeling for advanced logic and analog technologies, with a focus on model development, validation, silicon correlation, and modeling methodology. Prior to Intel, he spent over five years at GlobalFoundries, working on compact modeling and PDK enablement across logic, analog, RF-SOI, and high-voltage technologies. His work has focused on understanding device behavior, translating physical effects into predictive models, and connecting device-level characteristics with circuit-level performance. He received his Ph.D. in Applied Physics from the Indian Institute of Science, where his research involved device physics, analytical modeling, TCAD simulations, fabrication, and electrical characterization of thin-film transistors. His doctoral work resulted in a patented low-power ESD protection architecture.
If anyone would like to join the session online, please find the link provided below.
Refreshments will be Served after the seminar.
ALL ARE WELCOME.